89HPES10T4G2ZBBCG8 ADE Chip IC Interface Specialized 324cabga
Product Details:
Place of Origin: | original |
Brand Name: | original |
Certification: | original |
Model Number: | 89HPES10T4G2ZBBCG8 |
Payment & Shipping Terms:
Minimum Order Quantity: | 1 |
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Price: | negotiation |
Packaging Details: | carton box |
Delivery Time: | 1-3working days |
Payment Terms: | T/T, L/C |
Supply Ability: | 100,000 |
Detail Information |
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Series: | PRECISE™ | Package: | Tape & Reel (TR) |
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Product Status: | Obsolete | Applications: | Switch Interfacing |
Interface: | PCI Express | Voltage - Supply: | 3.3V |
Package / Case: | 324-BGA | Supplier Device Package: | 324-CABGA (19x19) |
Highlight: | 89HPES10T4G2ZBBCG8,IC Interface Specialized 324cabga,ADE Chip IC |
Product Description
89HPES10T4G2ZBBCG8 Integrated Circuits IC Intface Specialized 324cabga
Switch Interfacing Interface 324-CABGA (19x19)
Specifications of 89HPES10T4G2ZBBCG8
TYPE | DESCRIPTION |
Category | Integrated Circuits (ICs) |
Interface | |
Specialized | |
Mfr | Renesas Electronics America Inc |
Series | PRECISE™ |
Package | Tape & Reel (TR) |
Product Status | Obsolete |
Applications | Switch Interfacing |
Interface | PCI Express |
Voltage - Supply | 3.3V |
Package / Case | 324-BGA |
Supplier Device Package | 324-CABGA (19x19) |
Mounting Type | Surface Mount |
Features of 89HPES10T4G2ZBBCG8
• High Performance PCI Express Switch
— Ten 5 Gbps Gen2 PCI Express lanes
— Four switch ports
– One x4 upstream port
– Three x2 downstream ports
— Low latency cut-through switch architecture
— Support for Max Payload Size up to 2048 bytes
— One virtual channel
— Eight traffic classes
— PCI Express Base Specification Revision 2.0 compliant
• Flexible Architecture with Numerous Configuration Options
— Automatic per port link width negotiation to x4, x2 or x1
— Automatic lane reversal on all ports
— Automatic polarity inversion
— Ability to load device configuration from serial EEPROM
• Legacy Support
— PCI compatible INTx emulation
— Bus locking
• Highly Integrated Solution
— Incorporates on-chip internal memory for packet buffering and
queueing
— Integrates ten 5 Gbps embedded SerDes with 8b/10b
encoder/decoder (no separate transceivers needed)
– Receive equalization (RxEQ)
• Reliability, Availability, and Serviceability (RAS) Features
— Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
— Supports ECRC and Advanced Error Reporting
— Supports PCI Express Native Hot-Plug, Hot-Swap capable
I/O
— Compatible with Hot-Plug I/O expanders used on PC motherboards
— Supports Hot-Swap
Power Management of 89HPES10T4G2ZBBCG8
— Utilizes advanced low-power design techniques to achieve
low typical power consumption
— Support PCI Express Power Management Interface specification (PCI-PM 1.2)
— Supports PCI Express Active State Power Management
(ASPM) link state
— Supports PCI Express Power Budgeting Capability
— Supports the optional PCI Express SerDes Transmit LowSwing Voltage Mode
— Unused SerDes are disabled and can be powered-off
Environmental & Export Classifications of 89HPES10T4G2ZBBCG8
ATTRIBUTE | DESCRIPTION |
RoHS Status | ROHS3 Compliant |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
REACH Status | REACH Unaffected |
ECCN | EAR99 |
HTSUS | 8542.39.0001 |
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